1. Field of the Invention
The present invention relates generally to packaging of semiconductor dice and, more specifically, packaging of semiconductor dice to provide improved heat dissipation characteristics.
2. State of the Art
During operation, semiconductor devices typically generate large amounts of heat. The amount of heat that a semiconductor device generates is typically related, if not proportional to, the density of features of the semiconductor device. Heat reduces the reliability with which semiconductor devices, including processors and memory devices, operate. In addition, the exposure of semiconductor devices to elevated temperatures for prolonged periods of time may also decrease the useful lives thereof. Accordingly, the dissipation of heat from semiconductor devices has long been a concern in the semiconductor device industry.
The reduced power requirements of state-of-the-art semiconductor dice have been useful for decreasing the amount of heat generated by such semiconductor dice. Nonetheless, as feature densities are ever-increasing, the temperatures generated by semiconductor dice with even reduced power requirements will also continue to increase. Thus, heat dissipation continues to be of concern, even with the low power requirements of state-of-the-art semiconductor dice.
When a semiconductor die is encapsulated, or packaged, the most delicate regions thereof, such as the active surface that bears integrated circuitry and the bond wires that connect bond pads of the semiconductor die to corresponding leads of a lead frame or contacts of a carrier substrate, are covered with a dielectric protective material. In addition, other, more robust surfaces of the semiconductor die, such as the peripheral edges and backside thereof, are also covered with dielectric protective material. Unfortunately, many of the dielectric protective materials that are used to encapsulate semiconductor dice are not good heat conductors. As a result of the manner in which such dielectric protective materials have been used to coat semiconductor dice, a large amount of the heat generated by an encapsulated semiconductor die becomes trapped within or around the die.
Several approaches have been taken to improve the rate at which heat is transferred and dissipated from packaged semiconductor devices. Conventionally, large surface area structures formed from materials that have good heat conductivity properties and, thus, which are able to xe2x80x9cpullxe2x80x9d or transfer heat away from a structure, such as a semiconductor die, contacted thereby have been used to dissipate heat from the package during operation of the semiconductor die or dice thereof. These large surface area structures are generally known in the art as xe2x80x9cheat sinks.xe2x80x9d Air circulation systems, which often include cooling fans, have also been used, typically in combination with heat sinks or other heat dissipation means. While heat sinks and air circulation systems may be useful for maintaining conventionally configured semiconductor dice at acceptable operational temperatures in some applications, heat sinks are typically fairly massive and the size thereof prevents further increases in the densities at which semiconductor devices are carried upon circuit boards, as is desired to maintain the trend for ever-decreasing electronic device sizes. In addition, heat sinks may also present locational problems between adjacent, superimposed circuit boards and for space-critical applications such as laptop and notebook computers, cell phones, personal digital assistants and the like.
As an alternative to the use of space-consuming heat sinks, encapsulation processes have been modified to reduce the amount of dielectric protective material that covers the surfaces of semiconductor dice. Additionally, encapsulation techniques have been developed that protect the most delicate portions of a semiconductor die, while leaving other surfaces of the semiconductor die bare, thereby improving heat dissipation therefrom.
One such technique is described in U.S. Pat. No. 5,604,376 to Hamburgen et al. (hereinafter xe2x80x9cHamburgenxe2x80x9d), which describes a packaged semiconductor device in which a backside of a semiconductor die is exposed through an encapsulant to facilitate the dissipation and transfer of heat from the backside of the semiconductor die. The packaged semiconductor device of Hamburgen also includes leads to which bond pads of the semiconductor die are electrically connected. The assembly and packaging method described in Hamburgen includes temporarily securing a bare semiconductor die upon a pedestal by application of a vacuum through the pedestal to a backside of the semiconductor die. Leads are then electrically connected to corresponding bond pads of the semiconductor die by way of conventional wire bonding processes. Next, the assembly is positioned over a bottom half of a mold, with the backside of the semiconductor die resting upon a platform. Upon enclosing the semiconductor die and the bond wires within a cavity of the mold and as a molding compound is introduced into the cavity, a negative pressure is applied through an aperture in the platform to the backside of the semiconductor die, causing the backside of the semiconductor die to be pulled against the platform and purportedly preventing the molding compound from flowing onto the backside of the semiconductor die. This process may be somewhat undesirable for several reasons. For example, as the semiconductor die and the mold platform therefor are both rigid structures, any deviations in the planarity or mutual orientation of either the backside of the semiconductor die or the surface of the platform may permit molding compound to flow therebetween. Such planarity deviations, coupled with the force applied to the semiconductor die to temporarily secure the same to the mold platform, may also exert potentially damaging stresses on the semiconductor die during the encapsulation process.
Another example of a packaged semiconductor device that includes a semiconductor die with an exposed backside is described in U.S. Pat. No. 6,348,729 to Li et al. (hereinafter xe2x80x9cLixe2x80x9d). The packaged semiconductor device of Li is formed by attaching an adhesive-coated tape or film to a surface of a lead frame and securing a semiconductor die to the adhesive-coated tape or film, within a centrally located opening of the lead frame. Bond pads of the semiconductor die are then electrically connected with corresponding leads of the lead frame by forming or positioning intermediate conductive elements (e.g., bond wires) therebetween. Next, the semiconductor die, intermediate conductive elements, and regions of the leads that are located adjacent to the semiconductor die and above the tape or film are encapsulated. Finally, the tape or film is removed from the packaged semiconductor device structure (e.g., by peeling). Unfortunately, in addition to exposing the backside of the semiconductor die, surfaces of the leads are also somewhat undesirably exposed. Exposure of the bottom surfaces of the leads may increase the likelihood of electrical shorting between leads as the packaged semiconductor device is positioned upon a carrier substrate, such as a circuit board. Moreover, upon securing the packaged semiconductor device of Li to a carrier substrate, the backside of the semiconductor die thereof will be positioned adjacent or very closely to the carrier substrate, which may hinder the dissipation of heat from the backside of the semiconductor die, defeating the intent of exposing the backside.
During the preliminary stages of semiconductor device fabrication processes, the backsides of silicon wafers and other bulk semiconductor substrates are typically adhered to a preformed dielectric protective film, such as a polyimide film. In addition to protecting the backsides of substrates during fabrication processes and as the substrates are being handled and transported from one fabrication process location to another, these dielectric protective films also retain the positions of the various semiconductor devices that have been fabricated on a particular semiconductor substrate following singulation of the semiconductor devices, which are, at this point, commonly referred to as xe2x80x9cdice,xe2x80x9d from one another. The dice may then be tested or otherwise evaluated, and operable, useful dice picked from the dielectric protective film for further testing, assembly, or packaging.
The inventors are not aware of structures that facilitate heat dissipation from a backside of a semiconductor die through a molded encapsulant while reducing compressional stresses on the semiconductor die during encapsulation thereof and without undesirably increasing the size of the packaged semiconductor device or causing electrically conductive structures from being undesirably exposed through the encapsulant.
The present invention includes methods and apparatus for packaging semiconductor device assemblies in such a way as to facilitate the transfer of heat from the backsides of semiconductor dice thereof.
One aspect of the present invention includes a coating element for use on a backside of a semiconductor die. The coating element is configured to seal against a surface of a mold cavity during packaging of a semiconductor device assembly of which the semiconductor die is a part to prevent packaging material from covering or xe2x80x9cflashingxe2x80x9d over the backside of the semiconductor die. The coating element may also protect the backside of the semiconductor die during encapsulation of at least portions of the semiconductor device assembly. Accordingly, the material of the coating element may be a somewhat compressible or compliant, and resilient, material which is configured to act as a sealant against an inside surface of a mold while packaging the semiconductor device assembly. The materials of the coating element may also be compressible and compliant, but not necessarily resilient so that it remains in a substantially compressed state after the encapsulation process. The material of the coating element may also be somewhat durable so that the coating element may protect the die during the assembly and encapsulation processes.
The backside of a semiconductor die may receive a coating element prior to severing the semiconductor die from a common substrate upon which a plurality of semiconductor dice or other electronic components has been fabricated (e.g., at the wafer level), subsequent to singulating the semiconductor die from a wafer or other common substrate, or following assembly of the semiconductor die with a carrier therefor. The coating element may comprise a preformed, substantially planar element or a quantity of uncured material that will be cured and, optionally, patterned following application thereof to the backside of the semiconductor die. The coating element may be applied so as to cover substantially the entire backside of the semiconductor die or, in a variation, to cover only a portion of the backside of the semiconductor die at or proximate a lateral periphery thereof. In the case of applying coating elements onto semiconductor devices that have not yet been severed or singulated from a common substrate, the coating element may comprise a single member that substantially covers the backside of the common substrate and which is severed as the semiconductor devices that have been fabricated on the common substrate are singulated from one another, or separate coating elements may be formed on or secured to the backsides of each yet-to-be severed semiconductor device.
A semiconductor device assembly according to the present invention includes one or more semiconductor dice and a carrier. The carrier and at least one semiconductor die are oriented in a substantially parallel manner relative to one another with the backside of the at least one semiconductor die in the assembly facing outward in such a way as to contact a surface of a mold cavity during encapsulation of the assembly. The carrier and each semiconductor die assembled therewith are electrically connected to one another by way of intermediate conductive elements, such as bond wires, thermocompression bonded leads, conductive tape-automated bonding (TAB) elements carried by a dielectric polymeric film, or the like, for electrical interconnection of the carrier to each semiconductor die thereon.
In use of a coating element according to the present invention, a semiconductor device assembly including a semiconductor die with a coating element on a backside thereof may be positioned within a cavity of a mold. This may be done by placing a portion of the assembly in either a first cavity segment of a first mold section or a second cavity segment of a second mold section. In other words, the semiconductor device assembly may be positioned with the coating element adjacent a mold cavity surface of either mold section. As the first and second mold sections are assembled with one another, the semiconductor device assembly is enclosed within the cavity formed by the first and second cavity segments, with at least a portion of the carrier sitting between the first and second mold sections. With this arrangement, the coating element on the backside of a semiconductor die of the assembly may be positioned and sealed against the inside surface of a cavity half of one of the mold sections. Molten dielectric encapsulation material may then be introduced into the mold under pressure so that particular sensitive portions of the assembly, such as a lateral periphery and active surface of the semiconductor die and the intermediate conductive elements electrically interconnecting the die to the carrier, are encapsulated. The seal created against the surface of the mold cavity by the coating element on the backside of the semiconductor die prevents dielectric encapsulation material from flowing over or flashing onto and, thus, covering a substantial portion of the backside of the semiconductor die. By preventing the dielectric encapsulation material from covering the backside of the semiconductor die, heat may readily dissipate from the backside thereof. Further, the coating element provides a compressible surface on the backside of the semiconductor die to reduce potential stresses to the semiconductor die, such as stresses applied to the semiconductor die from the mold wall abutting the backside, during the encapsulation process.
The inside surface or wall of a portion of a mold cavity segment may include a surface finish of enhanced smoothness relative to the finish of the remainder of the mold cavity surfaces. Such a finish may be effected by grinding, lapping or polishing and be at least sized, shaped and positioned on a portion of the inside surface of the mold cavity segment to correspond with the dimensions of the backside of the semiconductor die. During encapsulation of the assembly, the enhanced smoothness surface finish provides a surface that readily creates a seal with the coating element on the backside of the semiconductor die so that the encapsulation material cannot extrude between the backside of the die and the inside surface to form flash on the backside during the encapsulation of portions of the assembly.
Following encapsulation, the packaged semiconductor device assembly may be mounted to higher-level packaging such as a circuit board for use in an electronic system, such as a computer system. In the electronic system, the circuit board electrically communicates with a processor, which electrically communicates with one or more input devices and output devices of the electronic system.
Other features and advantages of the present invention will become apparent to those of skill in the art through a consideration of the ensuing description, the accompanying drawings and the appended claims.